Abstract
The main issue on morphological operations is the analysis of the shape and structure of an object, or dealing with the relationship of different objects. In the field of digital image processing, we could make use of this mathematical tool which is highly related to the set theory for shape-based image processing, such as image segmentation, image enhancement, pattern recognition, image compression, etc. The basis of these various applications is erosion and dilation. All the methodologies utilize these two basic functions. Nevertheless, these advanced morphological operations take great computing complexities based on erosion and dilation. Designing a high speed architecture to implement the function of erosion and dilation would be an important issue. In this thesis, we propose an architecture that can achieve relatively high speed and low hardware cost to deal with the gray-level erosion and dilation of arbitrary-shaped structure elements. Experiment is conducted with the use of FPGA, showing the great performance of the proposed architecture.