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在三維多核心積體電路的架構下透過動態電壓頻率調整技術設計能量有效率利用任務排程
Thesis

在三維多核心積體電路的架構下透過動態電壓頻率調整技術設計能量有效率利用任務排程

吳丞彬
Masters, 國立清華大學, 資訊工程學系
2009

Abstract

排程 動態電壓 頻率調整 多核 三維積體電路 scheduling DVFS multi-core 3D IC
Energy-efficiency is important for future high-performance computing. Excessive energy consumption introduces serious thermal problems, which affect not only the system reliability but also the system performance. We focus on an OS-level scheduling to reduce energy consumption via a Dynamic Voltage and Frequency Scaling (DVFS) technique. We proposed a time-constrained task scheduler targeted toward a multi-core 3D IC. Our goal is to minimize the total energy consumption. Experimental results show that our algorithm is effective in energy minimization.

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