Abstract
H.264/AVC standard provides enhanced coding efficiency for a wide range of application. It gives better compression efficiency than other existing video coding standard. But the computation complexity of H.264/AVC decoder is higher than others, thus a software-based real-time decoder requires a powerful processor and more efficient algorithms. The major performance bottleneck of software-based H.264/AVC decoder is memory bus bandwidth. Because the H.264/AVC reference software spends too much time for memory access and data transfer, so it’s necessary to deal with memory bandwidth. There are three ways to deal with performance bottleneck. One is to increase the memory bandwidth. Another is using the memory hierarchy structure to speedup the memory access time. The other way is to reduce number of data transfer on external memory bus. This thesis proposes a method for H.264/AVC software-based decoder to reduce the number of memory accesses especially for memory cache based DSP processor. Our method incorporates deblocking filter with IDCT&IQ process, thus we could reduce unnecessary load/store from external memory. According to this decoding flow, we have to add extra predictor memory for intra prediction. But we can save nearly 44% predictor memory compared with former scheme. Furthermore, we implement the H.264/AVC baseline profile decoder on the Starfish DSP platform. The Starfish DSP is a low power and high performance embedded DSP core developed by National Tsing Hua University (NTHU) and National Chiao Tung University (NCTU). The experimental results show that the cycles of memory access for the data transfer reduced by 35.5%.