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多用途彈性緩衝器設計於非同步電路應用
Thesis

多用途彈性緩衝器設計於非同步電路應用

Chen, Yu-An
Masters, 國立清華大學, 電機工程學系
2011

Abstract

非同步電路 異步電路 非同步管線 彈性緩衝器 先進先出 超大型積體電路 Asynchronous circuit clockless circuit Asynchronous pipeline Elastic Buffer FIFO VLSI
Asynchronous circuits need no synchronization. Thus they can perform designated operation once the inputs are available, and the output can be delivered to the next stage when it is ready. The time needed to perform an operation is usually input pattern dependent. Due to no need of synchronization, the operation time is usually less than the longest path delay. If there is no delay in obtaining input patterns and in delivering results to the next stage, the asynchronous circuit can achieve average-delay performance, instead of worst-case delay that synchronous circuits must assume. In the case that the input cannot be supplied when the circuit is ready, the circuit must wait. This situation is called starvation. In the case that the output cannot be delivered to the next stage, the circuit also needs to wait. This is called blocking. Either starvation or blocking reduces the asynchronous circuit’s throughput. A buffer can be inserted in-between these stages to minimize the starvation and blocking and hence increase the asynchronous circuit throughput. In thesis, we present a general purpose Elastic Buffer for asynchronous circuit application. It works with both two-phase and four-phase handshaking protocols. The data bus width and the buffer depth can be easily scaled. The Elastic Buffer is implemented with custom C-elements, with parallel control signals and circular architecture for better area efficiency and performance. Using TSMC 65LP technology at 1.2V and 25℃.The store operation of the Elastic Buffer takes 69.5ps, fetch takes 174.6ps. Our Elastic Buffer also has a pass-through mode, which allows data to deliver to the next stage directly when buffer is empty. The pass-through operation takes 348.8ps. When the buffer is full, then the next data will need to wait until a slot is becoming available. The waiting time is called response time. The shortest response time is 386.5ps in our design. In order to verify our Elastic Buffer and measure the performance, we design a Self Run Circuit (SRC). More simulations with different operation delays and buffer depths are performed. The simulated throughputs match with the formula prediction, and we showed that with the Elastic Buffer the asynchronous pipeline throughput can be improved from 11% to 59% depends on the operation delay distribution.

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