Abstract
We propose a capacitor sharing method for multi-stage offset compensation. The offset voltage of the 1st stage can be compensated using the difference of voltages at output between two phases. The offset voltage of the 2nd stage can be canceled using a closed loop auto-zero compensation technique ( input storage ). Only one capacitor is required for a multi-stage circuit in case of single-ended implementation. The method can be applied to many types of a multi-stage circuit. Such as comparators, frequency shift keying (FSK) signal process system and so on. In the application of comparators, for example, only one capacitor is needed between two pre-amplifiers that are serial connection to compensate offset voltages. We proposed three comparator circuits with switched-capacitor amplifiers or switched-resistor amplifiers based on ping-pong structure. They can increase the active time. Similarly in the FSK signal process system, only one capacitor is needed between the high-pass filter and hysteresis limiter that are serial connection to compensate offset voltages. Such a circuit is mixed-signal mode, and thus we need to use the CADANCE tools to design the circuit. The HSPICE simulation of the designed compensation circuit shows that the input offset voltage can be reduced to less than 0.3%. It is realized by using TSMC 0.35mm CMOS process. The measurement result shows that we can reduce the offset voltage to mv level. The results prove that the capacitor sharing method is useful for multi-stage offset compensation.