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奈米線蕭特基電荷捕捉快閃記憶體之研製分析
Thesis

奈米線蕭特基電荷捕捉快閃記憶體之研製分析

陳亭安
Masters, 國立清華大學, 電子工程研究所
2014

Abstract

電荷捕捉式快閃記憶體 奈米線 蕭特基能障 Charge Trap Flash Memory Nanowire Schottky Barrier
This thesis experimentally explores the process fabrication and measurement characterization of Schottky barrier nanowire charge trapping memories. Two different types of hard-mask lithography were examined to fabricate the gate-all-around nanowire structure. In cell characterization, this work studies the cell reading, programming, and erasing at room and higher temperatures. Reliability characterization in cycling endurance and data retention are also investigated. The results show that the high-temperature Schottky barrier nanowire charge trapping cells preserve good electrical characteristics.

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