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嵌入式快閃記憶體之時間參數量測單元
Thesis

嵌入式快閃記憶體之時間參數量測單元

莫凱圳
Masters, National Tsing Hua University
2002

Abstract

嵌入式快閃記憶體時間參數量測單元 timingmeasurementembeddedflash memory
A wide-range and scalable time-to-digital conversion (TDC) is presented and is applied to measure access time parameter for embedded flash memory in this paper. Based on principle of pulse stretching, the proposed TDC is composed of multi-stage time-to-voltage conversion (TVC), peak voltage detector, voltage-to-time conversion (VTC) and ring counter. The number of stage of TVC is increased, and the resolution is improved. For a case study, four-stage TVC is used in TDC to measure time interval 3ns ~ 160ns under 500ps resolution with external clock 50MHz. The simulation results display that the measurement maximum error is one LSB after calibration and the linearity error is 0.625%.

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