Abstract
Low-power has become one of the predominant features in modern VLSI designs, espically for portable devices and high-density systems.In this thesis, we investigate a low-power design technique for Extended Finite State Machines (EFSM). It is based on the general dynamic power management concept, in which the unnecessary operations in a design are dynamically disabledto reduce the overall power consumption. The contribution of this thesis is mainly a systematic procedure to identify almost maximum amount of unnecessary operations in a design representedas an EFSM. There are two levels of unncessary operations to be exploited - one is based on machine state information, while the other is based on the state transition information. Afterthe extraction of these unnecessary operations, an input-gating based low-power architecture is used to synthesize the final circuit. We tested this technique on a design computing a number's montgomery inverse. Experimental results show that 31% power reduction can be achieved at the costs of only 2% timing penalty and 16% area overhead.