Abstract
Wafer yield is the most important issue in the semiconductor industry. Wafer Acceptance Test (WAT) diagnoses performance of wafers after the manufacturing process has been completed. Therefore there exists relationship between the WAT measurements and wafer yield. Traditionally, engineers determine the root causes (critical machines) of low wafer yield via a lot of complicated engineering data as a low yield problem occurs. In addition, diagnosis engineers have to communicate with other engineers to explore the root causes. The task takes a lot of time and human resources. Thus this research attempts to develop the methodology to help engineers to efficiently detect the root causes of low wafer yield by decreasing the volume of engineering data. This methodology can be used to automatically find out the root causes of low yield via WAT parameters. Therefore, the aim of this research is to explore the relationship between low yield and WAT parameters and to establish a mapping table to reveal the relationship between WAT parameters and critical machines. The mapping table can help engineers to determine the root causes more efficiently. To be specifically, the relationship between low yield and WAT parameters is explored by using the decision tree (CHAID) algorithm. The relationship between WAT parameters and critical machines is derived via the stepwise regression model and correlation analysis. Finally, engineering data from a real-world semiconductor manufacturer are employed to evaluate the performance of the proposed methodology.