Abstract
Flash memories, which have been used commercially, may have some unusual functional faults or parametric faults, not normally happened in other memory devices. Since the basic structure and operation mechanisms of flash memories are different from those of other memories, such as DRAMs or SRAMs, the failure behavior are also distinct. The traditional fault models ( and its corresponding test strategies ) presented in the past were mainly based on the functional behaviors and not upon the actually fabrication defects. Hence the developed test algorithms for the conventional fault models may have a long testing time and limited fault coverage. Inductive Fault analysis, namely defect oriented fault modeling has been shown to be efficient in searching the possible defects in a given layout or schematics. Popular NOR and NAND type flash memory layouts and their schematics have been presented in IEDM, 1993 and JSSC, 1989, respectively. A number of dust particles are dropped on those layouts, and those particles may cause some open or short defects in the corresponding circuits. By using Device simulator TMA/Medici, some faulty effects are injected to simulate in order to establish accurate fault models. Not only a new class of functional faults but also parametric faults have been shown that may occur in typical flash memories. A new test strategy specifically for the proposed fault models is presented in this work. Modified March test algorithm, called " March Flash " is proposed to detect those functional faults with 100 % fault coverage. And a new on-chip test circuit is also designed in order to detect these new parametric faults.