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快閃記憶體之內建式自我測試與診斷電路設計
Thesis

快閃記憶體之內建式自我測試與診斷電路設計

施淵源
Masters, 國立清華大學, 電機工程學系
2002

Abstract

快閃記憶體 自我測試電路 自我診斷電路 Flash Memory BIST BISD Built-In Self-Test Built-In Self-Diagnosis
Today the demand of flash memories grows quickly, especially for data storage. Conventional approach for flashmemory testing is ad hoc and high test cost. Moreover, it can not gain a high fault coverage of flash memory specific faults. In addition, the embedded flash memory will plays an important role for System-On-a-Chip (SOC) in the future. Thus testing and diagnosis of embedded flash memory is becoming a challenge. In order to reduce test cost and improve yield, the built-in self diagnosis (BISD) which includes built-in self test is suitable solution for RAM. As the RAM testing, it is practicable in flash memory testing. In this thesis, we present a BIST and three programmable BISD designs for various test requirement, they are flexible and easy to modified to suit the most flash memories. Our BIST/BISD circuit implementsMSCAN and March-FT algorithm and its area overhead is low, for example, all of our design are less than 1% for a 2Mb commodity flash memory. Additionally, our experimental results show the BIST/BISD scheme with small area overhead is suitable for flash memory testing. Finally, we also use our BISD design to develop a low cost diagnosis system. This system adopts Field Programmable Gate Array (FPGA) to realize a low cost tester.

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