Abstract
This thesis is a research about the design of flash memory control. As capacity of flash memory card grows, the design of flash memory control, which governs data in flash memory, is getting more important. We divide the issue of flash memory control design into several parts: logical/physical address translation, utilization of limited local memory, manners of caching data from flash memory to local memory and flash memory management. About those topics, a complete flash memory control model is built in this paper. Besides, the design has improved the speed of seeking free space and the tradition update-algorithm.In flash memory management, the emphasis of cycle-leveling enhances the flash memory performance dramatically. It shows that besides good clean policy and fine data classification, cycle-leveling is also essential for flash memory management.Finally, there will be a series simulation result which is computed from a developed software model of our design. It will be a strong proof of this design.