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應用於可攜式電子鼻之類比低功耗多層感知器類神經網路
Thesis

應用於可攜式電子鼻之類比低功耗多層感知器類神經網路

潘志恒
Masters, 國立清華大學, 電機工程學系
2010

Abstract

多層感知器類神經網路 倒傳遞 類比超大型積體電路 可攜式電子鼻 Multilayer perceptron neural network Back propagation Analog VLSI Portable electronic nose
This thesis presents an analog multilayer perceptron (MLP) neural network circuit with on-chip back propagation learning. This low power and small area network was proposed to implement as a classifier, which is intended to be used in a portable electronic nose (E-nose). The proposed MLP architecture was composed of four signal inputs, four hidden neurons (HN), one output neuron (ON). Twenty hidden synapses (HS) and five output synapses (OS) were used to connect neurons between different layers. Two comparators were utilized to clarify further the classification results. This simple structure allowed the circuit to have a smaller area and less power consumption. Both HS and OS were basically composed of two multipliers (Chible multiplier, CM. and Gilbert multiplier, GM), one weight unit W, and a back propagation multiplier (BPM) in OS was required to generate the back propagated error term. The Chible multiplier was chosen for CM and BPM because of its favorable linearity and wide operation range related to weights. A backward multiplier GM was adopted from the Gilbert multiplier to generate weight adaption value. The weight unit was a temporal signal storage device exhibiting the adaptation of weight value, and was implemented by MOSCap because of its smaller area. HN and ON consisted of an activation function circuit, its approximate derivative circuit, and a Delta block that calculated the error terms. The realization of the activation function simply involved a differential pair with input transistors operating in weak inversion and saturation region. The approximately derivative of the activation function was realized by implementing another differential pair with the referenced input node slightly different from that of the original one. To test the analog MLP, six hundred odor samples of three kinds of fruits were used. Three hundred samples were used to train the system; the MLP system learned to follow the target output successfully during the training procedure. After training, the other three hundred fruit odor samples were fed into the system to perform classification. The circuit was fabricated using TSMC 0.18 μm 1P6M CMOS process with 1.8 V supply voltage. The area of this chip was 1.353 □ 1.353 mm2 and the power consumption was 0.423 mW. Chip measurements showed that the proposed analog MLP circuit could be successively trained to identify three fruit odors with 98.33% accuracy.

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