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應用於清大開放式水池反應器之可程式陣列邏輯寬程中子監測系統
Thesis

應用於清大開放式水池反應器之可程式陣列邏輯寬程中子監測系統

朱楓鳴
Masters, 國立清華大學, 工程與系統科學系
2011

Abstract

可程式邏輯陣列 寬程中子監測系統 Field Programmable Gate Array Wide Range Neutron Monitoring System
Based on previous research on digitizing Campbell theory, we assured the feasibility on digitizing the traditional analog Campbell module. The main purpose of this research is to implement digital Campbell system on the Tsing Hua Open-Pool Reactor. In the early phase of the research, the Wide Range Neutron Monitor (WRNM) at Tsing Hua Open-Pool Reactor (THOR) is facing some functionality issues. In order to assure front end system functionality, we repaired and tested several modules on the WRNM. The broken modules are: two Campbell module and two PA-15 Preamplifier. After we changed circuit components and verified the circuit off line, we tested and calibrated the repaired modules on THOR. After repairing PA-15 Preamplifier and Campbell module, we stared verifying the Counter/Transmitter of the WRNM. Once we finish this stage of verification, it will be possible to connect the second suit of PA-15, Campbell, Counter/Transmitter with the newly installed fission chamber and set up a backup WRNM for THOR. Modification of the circuit and design testing can be applied on the backup system without interrupting the current WRNM system. At the time when this report is written, we have connected the three modules offline and did some basic testing. Once the test result is verified, we can start install the system online. While repairing WRNM, we also did research on digital Campbell system. We analyzed the signal from WRNM via oscilloscope and analyzed the signals to decide the specification for the digital design. After carefully examined the input signal, we decided that the system should have sample rate above 50 kHz and sample interval larger than 0.1 second. The digital Campbell design is carried out on FPGA boards, and the current design have been verified to be viable while reactor is at high power range. The FPGA based digital system build in this research has 12 bit resolution, two ADC channels, 488 kHz sample rate, 16.7 sample interval, zero dead time, and two extra counters.

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