Abstract
This thesis implements a complementary metal oxide semiconductor (CMOS) VGA with digitally controlled gain. This VGA adopts the degeneration type amplifier to vary voltage gain and uses the super source follower input stage to enhance the linearity. And a digital based DC offset calibration loop is proposed to achieve the DC offset cancellation.An experimental chip is fabricated in UMC 0.18 μm CMOS process and its total area . The VGA provide 64 dB gain range with 2 dB step and more than 10 MHz bandwidth. The current consumption from a single 1.8 V supply is less than 6.12 mA. The total harmonic distortion (THD) is small than -48 dB at the minimum gain setting when input signal operates at a 1 MHz and less than output swing. The input third intercept point (IIP3) is 4 dBV at minimum gain setting. The input referred noise is 12.3 at maximum gain setting. The output DC offset is less than the 100mV when 20 mV input DC offset is applied under after calibration operation.