Abstract
The electrical characteristics of metal-ferroelectric-insulator-silicon (MFIS) structures are studied. The ferroelectric layer is lead-zirconate-titanate (PZT). The insulator layer is Ta2O5. This structure is studied for the potential application of non-volatile memory devices. The PZT and Ta2O5 layers are deposited using RF magnetron sputtering and chemical vapor deposition, respectively. The orientation of C-V hysteresis loop is found to depend on both the polarization of the ferroelectric layer and the trapped charges injected into the insulator layer. In the Au/PZT/Ta2O5/Si system, the C-V orientation is counterclockwise when the applied voltage is below 7V and clockwise above 7V. The memory window measured from the C-V curves first increases and then decreases with the applied sweep voltage. These phenomena are explained by the combination of the polarization and the injected charge effects in the Au/PZT/Ta2O5/Si MFIS system.