Abstract
Abstract Charge-trapping (CT) flash is regarded as one of the most promising nonvolatile memory devices. Some approaches were proposed to further enhance the operation properties of CT flash devices by stacked high-k charge-trapping layer, stacked tunneling oxides with thicker physic thickness, metal gate with high work function, and SiGe buried channel(small band gap) . SiGe and Ge buried channel with different annealing temperature and various thicknesses of Si-cap layer on operation characteristics of charge-trapping (CT) flash devices were studied in this work. And We use different method to formation of high concentration SiGe layer or crystalline Ge layer. We can have 5 Conclusions, 1. Programming and erasing speeds of all samples with SiGe buried channel are faster than control sample.2. The thickness of Si-cap would affect the properties of programming and retention obviously.3. For deuces with pure Ge channel, lower annealing temperature should be better for the electrical properties of devices.4. The roughness of condensed SiGe layer would be a serious issue for the device fabrication.5. Good crystalline structure and low roughness SL layer would be a good buffer layer for the growth of crystalline Ge layer.