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提出3D-IC與系統封裝設計之快速模擬軟體的新架構
Thesis

提出3D-IC與系統封裝設計之快速模擬軟體的新架構

顏景陽
Masters, 國立清華大學, 資訊工程學系
2009

Abstract

電路模擬 傳輸線 系統封裝設計 兩層印刷電路板 四層印刷電路板 分散式模型 Circuit simulation Interconnect System-in-Package Designs 2-layer PCB 4-layer PCB distributed model
The trend of advanced 3D IC and system-in-package (SiP) designs is toward gigahertz-level operating frequencies and very compact form factors. Leveraging the design methodologies of packaging, PCB board, VLSI, or RF, is not practical during advanced 3D IC or SiP designs because those methodologies assume the availability of microstrips and striplines, which are rarely available to the designers of 3D IC or SiP. Therefore, interconnect problems on 3D-IC and system-in-package mandate a new design software platform that can address the needs of high-performance 3D IC and SiP designers. In the low frequency design, metal connections between different components can be thought as perfect connections which will not affect the performance. However, the requirement for high frequency product has become a trend now. Those connections used in the package should be modeled as transmission line. Therefore, those issues of signal integrity such as RC delay, IR drop, substrate coupling, crosstalk, impedance match, Electromagnetic Interference, reflection … etc on 3D IC and system-in-package need to be modeled accurately and be taken into account in the design flow so that simulation and modeling of these interconnections have become more and more important. It is important to quantify these values and need more researches for better understanding them. We’ll use 3 dimensional field solvers to analyze the basic electrical properties of 3D IC and system-in-package in this thesis. Then we’ll design a fast 3D electromagnetic-based RLC Extraction Software Structure and observe the real behavior of the circuit, and we quantified the signal integrity problems on 3D IC and system-in-package. We’ll provide an accurate and user-friendly simulation software advanced interconnect modeling software (AIMS) to help designers to increase the design productivity, to minimize the design cycle, and to maintain the signal integrity and power integrity in this thesis. We can give suggestions to the designers on how to achieve better signal integrity in high-speed 3D-IC and SiP system-in-package.

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