Abstract
Comparing with stacked gate flash memory, split gate flash memory has the advantage of higher programming gate current and efficiency. However, with a additional select gate, It’s difficult to achieve higher storage density and scale down capability. In this study, a new split gate flash cell with vertical transistor is proposed to not only acquire higher efficiency with novel programming mechanism, but also to reduce cell size for high density application. It is named Ballistic injection AND - Type Flash EEPROM (BiAND) when it’s realized within an AND array. In this thesis, the BiAND fabrication process flow is designed and possible array configuration is studied. The basic electrical characteristics of a BiAND cell is comprehensively with process and device simulation. Extensive discussion between the cell performance and the process variation is included for the feasibility analysis of this novel cell.