Abstract
The requirement of data storage increases with the portable products application. The flash memory dominates the NVM market recently. But the enormous scaling difficulty is countered with physical limit of flash memory. ReRAM is proposed to instead of flash memory in the future. Most of ReRAM and CBRAM are fabricated by the materials which are not compatible with CMOS procces. It is need to be integrated to the CMOS process for the applications. This study proposed a novel fully-logic compatible lateral conductive bridge random access memory. The W/TiN/Ti/poly si memory node is the sidewall structure between poly-si and a CMOS regular contact plug . The Ti-atomic switch mechanism is confirmed by the non-insulator layer structure. The 10 HRS/LRA window is maintained by bipolar switching of LCBRAM . The state switches in 50ns/1.5V set operation and in 5ms/-1V reset operation. The data is not disturbed in 10,000 second by 0.3V read condition. And state can sustain in 1,000 set/reset pulse cycles. No obvious state changes over 1,000 hours amd 125∘C baked. A poly diode is used to prevent the sneak current for 1D1R structure beyond the silicon bulk. Finally, the proposed new cell is a very promising solution for future embedded MTP applications.