Abstract
In the process of wafer production, several causes might result in defect regions on a wafer. Defect causes can be identified by analyzing defect patterns on wafer maps obtained from chip probing. In the past, engineers need to manually inspect defect patterns on each wafer map. Although manual inspection guarantees an adequate accuracy for wafer failure pattern recognition, it is an inefficient and tedious task. The purpose of this research is to perform automatic defect pattern classification through the use of machine learning techniques so that both the cost of human labor and the error rate in manual wafer analysis are reduced. Past method are to classify the data by using the raw wafer map location. However, this method is inefficient when the collected wafer data are large. The proposed method focuses on the innovation in feature extraction. Based on the characteristic of wafer maps, three types of feature are extracted: geometric, Radon and miscellaneous features. Most of feature types preserve the attribute of rotation-invariant and scale-invariant. Each wafer map is then represented by a feature vector. A support vector machine is used as the classifier. In this research, we define four failure patterns and divide the classification process in two stages. In the first stage, the system determines if the wafer map is either one of the four failure patterns or none of them. If the wafer map is determined as one of four failure patterns, the second stage of the system identifies which one of failure patterns the wafer is. In the experiment, we examine the effectiveness of different features and the feature dimension is projected from 306 to 90 via dimensionality reduction. This yields a failure pattern recognition rate of 91.1%, which proves that the proposed method significantly outperform the previous method. The experimental result shows that the proposed features has satisfactory efficiency and accuracy result in large scale dataset.