Abstract
Metal-oxide-semiconductor field-effect transistor (MOSFET) is widely used in analog and switching device for integrated circuit. To achieve high speed and performance device, in past decades the semiconductor industries indefatigably strive to shrink the chip size; however, this scaling trend has met several seriously technological bottle-neck and fundamental physical limits. To date, the emerging researches on searching novel two-dimensional (2D) semiconductor material are largely motivated to escape this dead end. In this thesis we attempt to adopt a different approach to implement a logic latch by using a grapheme acoustic-electric transducer. Our device consists of two pairs of dual inter-digital transducer (IDT) to launch surface acoustic wave (SAW) on top of LiNbO3 substrate, graphene prepared by chemical vapor deposition, and ionic-liquid gate used as a gate electrode to tune the Fermi-level of grapheme. We measure the acoustic-electric current Iac of graphene as a function of the gate voltage Vg. We find Iac changes signal and crosses zero as Vg is tuned over a charge neutral point. Accordingly, we can define a current on and off state with ratio (ION/IOFF) over 108. Unlike conventional MOSFET where the conduction channel is formed by the gate voltage, graphene forms an intrinsic 2D channel. Therefore, we can directly modulate the RF source of SAW and get a latch function of the device with the ION/IOFF ~ 104 up to 10 kHz. We also demonstrate a flip-flop function by using one IDT to induce Iac and another crossed IDT to switch it off, which is analogous to the three-terminal operations in MOSFET. Our device hold several advantages: no use of source-drain voltage so to significantly lower the cost of electric power, potential for high switch speed which is in principle limited by the SAW frequency, and possible integration with graphene-FET device. Our graphene acoustic-electric latch open a route for the future development of various novel logic-gate devices.