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標準0.18um CMOS製程中整合二階段式單斜率類比數位轉換器之影像感測器電路設計
Thesis

標準0.18um CMOS製程中整合二階段式單斜率類比數位轉換器之影像感測器電路設計

陳冠彣
Masters, 國立清華大學, 電子工程研究所
2016

Abstract

兩階段式比較單斜率類比數位轉換器 Two-step single slope ADC
The purpose of this work is to integrate photovoltage-sensing pixels, correlated double sampling circuit, analog-to-digital converter (ADC) and peripheral circuits in a single chip. Make it easily to be applied to multi-function consumer electronics. Single-slope ADCs (SS ADC) are suitable for column-parallel CMOS image sensor readout architectures owing to their simplicity, high linearity and low power consumption. This work proposes a column-parallel two-step single-slope ADC (TSSS ADC) for high speed CMOS image sensor. The conversion speed of the proposed ADC is faster than conventional SS ADC. Therefore, TSSS ADCs can handle higher resolution consumer electronics. Designed resolution is 10bit, and the sampling rate is 33kHz. A 64×36 image sensing pixel array was fabricated with TSMC 0.18 μm CMOS technology, based on the specifications of a Full HD camera-on-ship system with high dynamic range and 30 frames per second.

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