Abstract
因為在經濟效益, 速度及可靠度上的優點, 混合類比數位積體電路( mixed signal VLSI) 越來越受到工業界的重視。混合類比數位積體電路 的設計與測試比純類比或純數位電路更為困難, 因為類比電路與數位電路 在本質上有許多不同的特性。 Sigma delta 轉換器(sigma delta converter) 利用一個較高的超取樣頻率(oversampling frequency)以獲 得高解析度。它提供一個不同於傳統設計類比數位轉換器 (analog-to- digital converter) 的方法, 此一方法對於類比元件之要求較低而且較 節省生產成本。在本論文中我們提出一個二階全管線sigma delta 調變器 的設計。此調變器是利用 電阻-電容(RC)結構的電路, 不同於一般常用的 開關電容器(switched-capacitor), 其目的在於減少調變器於高取樣頻率 時的失真。其行為模擬, 電路模擬, 佈局及功能性測試方法將被仔細的討 論。此一調變器已經以 UMC 0.8μm DPDM CMOS 技術製造。一個類比極 點-零點 錯誤模型(pole-zero fault mo- del) 於本論文中被提出, 因為 許多類比元件的頻率響應可以用主要的極點及零點來表示, 所以頻率響應 的改變也可以用這些極點和零點的偏移來描述。因此它可以用來幫忙產生 偵測類比元件AC錯誤的測試式樣(test patterns)。它可用於混合類比數 位電路的測試因為這些test patt- erns 可以由數位式測試儀器產生。根 據此錯誤模式我們提出對於類比元件如運算放大器的時域測試方法。此方 法可以偵測類比電路的DC及AC錯誤, 而且它比功能性測試法節省成本。 The mixed signal ICs attract a great deal of attention from the industries because of their advantages in economy, performance and reliability . The design and test of mixed signal VLSI circuits are more difficult than those of pure digital or analog circuits because digital circuits and analog circuits have different characteristics in nature. Sigma delta converter provides an alternative way to implement a high resolution analog-to- digital converter which has weaker requirement on analog components and is cost-effective in production. It uses the oversampling technique to achieve high resolution. A second- order fully- pipelined sigma delta modulator is presented in this thesis. It is a RC structure modulator rather than the conventional switched-capacitor structure in order to speed up the performance of the modulator. The behavior simulation, circuit simulation, circuit layout and functional testing method are discussed in detail. The sigma delta modulator that we propose has been manufactured with UMC 0.8 .mu m DPDM CMOS technology. An analog pole-zero fault model is proposed in this thesis. Therefore, it helps in generation of test patterns for detecting AC faults of analog devices. It can be used in testing of mixed-signal circuits because these test patterns can be generated by digital testers. We propose a time-domain test method for analog components such as operational amplifier in mixed- signal IC based on our fault model. It can detect both DC and AC faults of analog circuits. Furthermore, it is cost-effective compared with functional testing method.