Abstract
本論文之目在了解不同厚度的TiN其應力的變化對大小不同的接觸洞，在淺接面漏電流上會有何改變。論文中 ，以離子佈植穿透一層非晶矽薄膜後，鍍上Ti，以 2-step RTA快速升溫退火步驟同時形成淺接面與C54TiSi2，配合大小不同的接觸洞及不同厚度的TiN為擴散障礙層，量測在反向偏壓5V時之漏電流。此外，以XRD來了解TiN以及TiSi2在不同RTA溫度下之薄膜性質變化，並以SIMS二次離子質譜儀分析與SEM掃瞄式電子顯微鏡來觀察接面的深度。 結果以不同的佈植量 5e15/cm2與2e15/cm2的試片中，在LPCVD TiN 300A與LPCVD TiN 500A兩組中，發現同樣沈積LPCVDTiN 300A的試片皆有較小的(JRP)周邊漏電流密度。另外,我們將Ti 鍍在非晶矽上，分別以第一步RTA650℃、700℃、750℃ 各30sec再經第二步RTA 900℃ 40sec後，發現較高的第一步RTA溫度可得到較好的TiSi2薄膜性質，即較的低電阻率以及較明顯的C54相。此外以較高的第一步RTA溫度亦可有效地降低淺接面之漏電流密度。另外，由SIMS兩次離子質譜儀分析及SEM掃描式電子顯微鏡觀察的結果，可求得接面之深度大約為 700A 左右。The purpose of this paper is to know that different thicknessTiNwhich variations of stress to different size of contact holewillhave any changes on shallow junction leakage current.we useionimplant through an amorphous thin film,then sputtering Ti toformTisilicide and shallow junction at the same time by two stepRTA(rapid thermal annealing),matching contact hole of differencesizeand TiN of difference thickness,and measuring leakagecurrent atreverse bias 5(V).Besides,by XRD to know TiN and TiSi2orientation,SIMS to obrserve junction depth.The result indicatedthat between LPCVD TiN 500A and TiN 300A sample which depositTiN 300A had smallerJrp.In addition,sputtering Ti on a-Si firstby RTA 650,700,750 30sec and second by 900 30sec,we can find thefirst higer RTA temperaturecan get better TiSi2 that is lowresistivity and more C54 phase.It can also efficently reduce Jrpof shallow junction.Furthermore by SEM,we get junction depthabout 700A.