Abstract
This thesis describes a complementary metal oxide semiconductor (CMOS) Variable Gain Amplifier (VGA) with digitally controlled gain. Implemented in a standard 1.8V, 0.18 CMOS process, this VGA adopts the degeneration type amplifier to vary voltage gain and uses the super source follower input stage to enhance the linearity. Besides, instead of any resistor model, this VGA’s resistor network only uses transistor-level substitution in order to eliminate the non-linear effect of MOS switches and achieves high linearity. A comparator is used in measuring DC offset voltage, and digitally controlled calibration loop is applied to achieve the DC offset cancellation.An experimental chip is fabricated in TSMC 0.18 μm CMOS process with total area of . The VGA provides -6~56 dB gain range with 2 dB step and more than 20 MHz bandwidth. The current consumption from a single 1.8 V power supply is less than 6.6mA. The total harmonic distortion (THD) is smaller than -55.5 dB at the minimum gain setting; smaller than -62dB at the maximum gain setting when input signal operates at a 1 MHz and less than output swing. The input third intercept point (IIP3) is 18 dBV at 0dB gain setting, and the input referred noise is 15.9 at maximum gain setting. The output DC offset is less than the 100mV when 20 mV input DC offset is applied under calibration operation with calibration time less than 5us.