Abstract
This thesis is dedicated to research the through wafer electrical interconnection technology which can be used in MEMS package In this thesis, we choose via type as through wafer electrical interconnection, We use the dry-etch (ICP) or wet-etch (KOH) technology to etch the via, and wetting layer is deposited by E-Beam evaporation and electro-plating, the Pb/Sn ball is drive-in in the vacuum chamber. The effect of the via`s sidewall structure and wetting layer on the Pb/Sn ball drive-in process were discussed. The sidewall profile and cross section of the fabrication through wafer interconnection were inspected by SEM .The electrical interconnect resistance were measured by HP4156 and reliable interconnections were achieved with very small contact resistance.