Abstract
Multimedia, image processing and other signal processing applications often involve data stored in large arrays. Due to chip area limitation, arrays are typically assigned to off-chip memories, such as DRAM. This being the case, we try to optimize off-chip memory accesses to improve performance. We take the characteristics of the current mainstream SDRAM memory into account. Based on widely-used paging policies of memory controllers, we propose an algorithm to allocate arrays to different banks. This increases the probability of utilizing SDRAM's multi-bank characteristic. Experimental results show significant improvement over traditional approaches.