Abstract
This paper proposes a novel power simulation technique utilizing pre-characterization and annotation to achieve fast and accurate processor power simulation. Since low power consumption has become a default requirement for system-on-chip (SOC) designs, fast and accurate power estimation is essential for system designs. However, constrained by tight coupled simulation and power models, current system-level processor power estimation techniques have to compromise estimation accuracy for simulation speed. In contrast, our proposed novel technique performs static power analysis (pre-characterization and annotation) for accuracy and then dynamic power calculation (runtime simulation) for speed. The experimental results show that the proposed approach can achieve both high efficiency (more than 200 MIPS) and high accuracy, within 3 % error rate compared with gate-level power simulation.