Abstract
Recently, with the portable electrical products are popularization, the non-volatile memory (NVM) devices advance fast in fabrication technology, structure, operation condition and reliability. Especially in scaling of CMOS technology, silicon-oxide-nitride-oxide-silicon (SONOS) memory devices become appealing because of their high compatibility with existing advanced CMOS technology, structural simplicity and low-voltage operation as compared to traditional floating gate memory. Besides, due to the charges can be locally trapped in the nitride layer, multi-bit storage in a unit cell can be achieved. Understanding the charge distribution of the nitride layer can help in optimizing the program operation and minimizing the oxide damages in cycling. This thesis is studying “the different programmed charge distributions in p-channel and n-channel SONOS devices by channel hot electron injection (CHEI)” and further discusses their reliability. In this experiment, we use the forward and reverse reads to measure the location of charges in the channel, and use TCAD simulation (i.e., Medici) for comparison. Considering the difference between the forward and reverse reads in simulation, we place negative charges in the nitride layer of SONOS devices to fit the measured Id-Vd curves of SONOS devices. The programmed charge distributions of both p-channel and n-channel SONOS devices can be obtained. Therefore The result clearly shows that the channel hot electrons should be uniformly injected and stored in the nitride layer of p-channel SONOS devices, which is very different from what we know in n-channel SONOS devices. In n-channel SONOS devices the charges are locally trapped. In the endurance and retention characterizations, better reliability in p-channel SONOS device is observed as a result of the uniformly bipolar directional stresses during program/erase operations.