Abstract
We implement one of on-chip-bus standard – AMBA (Advanced Microcontroller Bus Architecture). On-chip-bus architecture is a shared common link, which use one set of wires to connect multiple subsystems. In SOC design, bus architecture must provide efficiently, high performance and low power integration. AMBA specification was released from ARM Limited from 1995. AMBA provides good integration solution in SOC design. In this thesis, we design each component in AMBA, including master, slave, arbiter, decoder and bridge. Besides, we design ARM behavior wrapper as a system controller, memory controller wrapper, DMA controller wrapper and an AES IP wrappers by reusing AMBA components. We build a system based on AMBA architecture for verifying the AMBA transfer protocol. This system integrates the AES IP and controls the IP to do the encryption/decryption operations. The designs of AMBA components are described in Verilog hardware description language and are synthesizable.