Abstract
Semiconductor Process plays an important role in competitive industries in Taiwan. Photolithography is the most complicated and key part in IC process flow, taking up about 40%~50% above all process. It is necessary to allocate mask, machine and wafer in the process flow appropriately. In order to reach efficiency and increase rate of equipment utilization, reducing cycle time(C/T) of wafer on each machine during photolithography is expected. It's capable of install coater, exposure and developer in series on the same machine to shorten C/T. However, there are still many methods to keep cutting down C/T .Except for adding parallel machine, running the existing parallel machine efficiently is also required. In other words, it makes every machine reach the best in the loading and reduce C/T on the restrictions of mask by transferring goods. It does works, and wafers are produced on time as expected. This research collected information of an IC manufactory in Science Park to set up a model of photolithography considering all the constraints on process. We found out a better wafer transfer dispatching solution through SSO algorithms and MM-SSO, and establishing a complete arithmetic logic applied to photolithography dispatching system. After testing and debugging, the logical operation can be applied to the follow-up study and demonstration in pratice. It's able to downsize and save time about 70% by algorithms automatic dispatching.