Abstract
Functionality and combinationality are two main issues that have to be dealt with in cyclic combinational circuits, which are combinational circuits containing loops. Cyclic circuits are combinational if nodes within the circuits are de nite values under all input assignments. For a cycli ed circuit, we have to check whether it is combinational or not. Thus, this paper proposes an ecient two-stage algorithm to verify the combinationality of cyclic circuits. A set of cycli ed IWLS 2005 benchmarks are performed to demonstrate the eciency of the proposed algorithm. Compared to the state-of-the-art algorithm, our approach has a speedup of about 4000 times on average.