Abstract
As the time-to-market pressure and system-on-chip (SOC) device complexity keeps increasing, reusing complex building blocks or Intellectual Property (IP) forces the designers to face the problem of integration. There are many problems involving in SOC design and test integration. One of them is the large amount of signal interconnections between IPs. The Advanced Microcontroller Bus Architecture (AMBA), published by ARM Limited, defines an on-chip communications standard for designing high-performance system chips, and has been widely used as an on-chip bus protocol in a system chip. In this thesis, an AMBA wrapper generation tool is proposed. This tool generates the synthesizable communication interfaces that satisfy the AMBA AHB protocol in a system design context, which is best used in an AMBA-based system chip that requires IP integration. We also provide an effective way to verify the bus wrappers. The testbench is automatically generated by the tool. Experimental results show that the wrappers generated via our wrapper generator are AMBA compliant and greatly reduce the time to produce an AHB wrapper at the expense of very small area overhead.