Abstract
With the growing popularity of non-volatile storage, the embedded non-volatile memory (NVM) has attracted much interest recently due to its compact cell size and high reliability. Integrating CMOS logic and NVM within same chip, embedded NVM becomes very important for long term storage of essential system information, especially in portable devices. In embedded NVM, one-time programmable (OTP) memory is used for code storage, redundancy implementation and initial setting. In this dissertation, a novel CMOS logic compatible Twin-Gate OTP cell fabricated by a pure 28nm high-k metal gate (HKMG) CMOS process is proposed. This new structure uses gate dielectric breakdown as programming mechanism and a merged gate spacer as isolation. The self-aligned metal gate isolation allows two adjacent cells to operate independently with a very small cell size. The electrical analysis shows fast program speed and well isolation capability of the cell. Moreover, excellent disturb immunity and data retention at 150oC for 1000 hours further prove its superior reliability. In this study, a highly dense 64kb Twin-Gate OTP array is successfully demonstrated in 28nm HKMG CMOS logic technology as well. Without the requirement of extra masks, this new self-aligned cell featuring low program current, fast program speed, large read window and outstanding reliability and scalability is one of the promising solutions for low power and high density logic OTP applications.