Abstract
Flash memory is the only non-volatile semiconductor storage technology for mass production, and dominates the market of high-technology electronic products nowadays. However, flash memory suffers from many of challenges with scaling down, such as gate oxide leakage, soft breakdown, density limit, etc. For this reason, it is necessary to develop a new NVM, in order to pursue higher density, scalability and faster access speed. Resistive Random Access Memory has become the focus of many memory studies in recent years, it's a candidate as the next-generation NVM for the future, as a result of its strong advantages in scalability, non-volatility, endurance. In this study, we discuss the fabrication and architecture of vertical bipolar junction transistor (BJT) and lateral SiGe bipolar junction transistor, fabricated by 65nm and 28nm CMOS logic process without any extra mask. The vertical BJT basically could be extended to two parts: P+ doping and I/O PLDD doping on base pick up structures. The characteristics for different structures of new BJT are presented. The lateral SiGe BJT is composed of PMOS in parallel. It has the advantage of good current gain due to base width could in small size. Finally, the structure of BJT has been successfully demonstrated by measurement result. We believe that it is a very promising solution for future high density and embedded NVM applications.