Logo image
金屬/氧化鉭/半導體電容器之製備及其電性分析
Thesis

金屬/氧化鉭/半導體電容器之製備及其電性分析

蘇詠詮
Masters, 國立清華大學, 電子工程研究所
1999

Abstract

氧化鉭 薄膜 電容器 電性 製備 Ta2O5 tantalum tantalum oxide capacitor n-type
In this paper, we study Electrical Character of Au/Ta2O5 /n-type Si .The Ta2O5 films are deposited by plasma enhanced chimerical vapor deposition system. We discuss electrical character of Au/Ta2O5 /n-type Si with different annealing conditions. It is shown that Poole Frankel conduction will be observed in Au/Ta2O5 /n-type Si with rapid thermal annealing (RTA) 400°C 30 sec, with rapid thermal annealing 400°C 60 sec and with annealing 550°C 60 sec, without any annealing conditions and that hopping conduction will be observed in Au/Ta2O5 /n-type Si with rapid thermal annealing 550°C 60 sec at low bias (lower than 1.5V). We also discuss the Character of C-V curves. The flat band voltage (VFB) is measured before and after the constant voltage stress. We find that VFB shift due to constant negative Voltage. It is because electrons or holes are trapped in the Ta2O5 films. We find the interface trapped charge (Dit) of Au/Ta2O5 /n-type Si with RTA 400°C 30 sec is about, the interface trapped charge of Au/Ta2O5 /n-type Si with RTA 400°C 60 sec is about., and the interface trapped charge of Au/Ta2O5 /n-type Si with RTA 550°C 60 sec is about. by conductance method. And trapped electron and hole densities are measured by using tunneling front model. The flat band voltage shift is explained by Au/Ta2O5 /n type Si band diagram. And it is found that flat band voltage shift will become more negative when Au/Ta2O5 /n type Si Capacitors is applied to constant negative voltage stress.

Metrics

1 Record Views

Details

Logo image