Abstract
The text of this article is fabrication of FRAM which designed by senior and TiPt co-sputtering electrode. Full FRAM process include twelve mask. Front-end process is standard CMOS process. Back-end process is ferroelectric process. This two process can be fabricated and tested individually. For CMOS device testing, compare to 950℃, 30min drive-in, the threshold voltage of PMOS was improved from +15V to +1V after 850℃, 30min drive-in. Sheet resistance and contact resistance are higher for 850℃ drive-in. The threshold voltage of NMOS is 0.9V. The rise time and fall time of transmission gate is shorter than NMOS or PMOS. For ferroelectric process, PZT film on SiO2 was peeled off after annealed. So this process was failed. For the analysis of TiPt co-sputtering electrode, the full-Ti electrode was diffused into silicon after annealed, but full-Pt electrode wasn`t diffused.