Abstract
Sequential lateral solidification (SLS) technology developed for crystallizing amorphous Si enlarges grain size and controls the position of grain boundaries effectively. However, thin-film transistors made by SLS suffer reliability issues possibly due to the innate sub-grain boundaries parallel to the drain current direction as a result of this unique solidification process. In this thesis, we observed channel-width-dependent degradation on these devices after hot carrier stress. A degradation model was proposed and verified by comparing the measured characteristic with the simulated behavior on the proposed sub-circuit, which successfully explains the degraded transistor behavior and its width dependence.