Abstract
Consumers’ eager demand of electronic devices with great functional diversification, lightweight, miniaturization and high performance has nowadays pushed the advancement of electronic packaging technologies toward system integration. One of the promising solutions to the challenges is three-dimensional (3D) chip stacking packages with micro-bump or/and through-silicon via (TSV) technology. The technology has attracted great attention from academia and industry because of greatly-increased function density and significantly-reduced package profile and interconnect length, thereby leading to drastically-enhanced electrical performance. However, integrating heterogeneous and homogeneous systems in a compact module tends to create high power density, thereby resulting in high local temperature or hot spots, which may induce high local stresses on the module due to mismatch of thermal expansion coefficient (CTE) among components. The high local stresses are believed to be the main cause of the failure of electronic components, such as the interconnects. The issue becomes even more challenging and critical for fine-pitch interconnect applications where micro-bump size becomes smaller. In the study, a high-density, ultra-fine-pitch 3D chip-on-chip (CoC) interconnect technology using Cu/Ni/SnAg micro-bump interconnect is first introduced. During the thermocompression bonding process, chemical reaction and diffusion would take place at the interface between the Ni layer and Sn metal in the Sn2.5Ag solder to form a Ni3Sn4 intermetallic compound (IMC) layer. The IMC layer may have a great impact on the interconnect reliability due to its hard and brittle nature. The research starts from the investigation of the growth reaction of the Ni3Sn4 IMC during thermo-compression bonding process through experiment and classical diffusion theory. The relationship between the Ni3Sn4 IMC thickness and bonding temperature/time is derived, based on the predicted activation energy of the chemical reaction of the IMC layer by experiment. Next, the interconnect reliability of the 3D CoC interconnect technology subject to accelerated thermal cycling (ATC) loading is characterized through numerical modeling using finite element (FE) analysis together with an empirical Coffin-Manson fatigue life prediction model and experimental validation. The focus of the work is placed on the dependence of the geometry and materials of the IMC layer on the interconnect reliability, including thickness, thickness ratio, material properties and surface geometry/morphology. Both 2D plane strain and 3D global-local FE models are applied, and the computed results are compared with each other and also with the ATC experimental data to demonstrate the effectiveness of these two FE models. The alternative goal of the study is to experimentally examine the influence of the underfill on the reliability and also failure mechanism of the interconnect. At last, parametric FE study is carried out to seek a design guideline for an enhanced interconnect reliability. Besides, the response surface method (RSM) combined with face central composite design (FCCD) experimental design is performed to explore the combinatorial effects of the selected design parameters on the interconnect reliability, and also the optimal combination of the parameters for an enhanced interconnect reliability.