Abstract
During the development of semiconductor process, scaling down node size is the main way to reduce cost and enhance performance. Starting from 10 μm, the node size shrinks to 14 nm, 10 nm, 7 nm, even 5 nm now. Scaling down results in severe electron surface scattering within copper interconnects, thus the resistivity and the RC-delay grow higher. Besides, the current density within copper interconnects is also enhanced so that it is easier for electromigration of copper inside the interconnects which causes failure. In this thesis, the author would like to grow graphene on by ECR-CVD on short line width interconnects. Graphene can reduce the interconnect resistance by shunting with interconnects, and being the capping layer to enhance the breakdown current density interconnects can endure. By using plasma-assisted CVD, the growth temperature can be reduced to 400 °C and lower the thermal budget. The author also grew graphene by ECR-CVD on different thickness of copper, such as copper foil (25 μm in thickness), copper thin film (50 nm in thickness), planar interconnects (200 nm in width) made from our lab. In order to find better parameters for ECR-CVD for trench interconnect (less than 100 nm in width), the author applied design of experiments which can find optimized parameters for ECR-CVD. Finally, the author figure out that graphene can lower the resistivity and enhance the current density of copper interconnects. ECR-CVD has great potentialities integrating with modern backend technology, thus improves the stability of interconnect.