Abstract
Process Study of Higher-k Gate Stack Dielectrics and Interfacial layer for MOS Devices.Introduction of high-k,exotic higher-k gate dielectric,interfacial layer of chemical oxide and stress relieved preoxide. Three chapters of Experiment and Results. Increased dielectric constant of HfO2 and ZrO2 gate dielectrics by Ti cap.Ti cap increased HfO2 dielectric constant from 25 to 34 and no extra IL growth after PMA 600 ℃.The devices with Ti cap have poor hysteresis and reliability .The device with Ti cap will increase dielectric thickness by PDA.The devices with PIII nitridation has better hysteresis property. Effects of Ti cap on ZrSixOy gate dielectric. Zr metal layer will react with SiO2 after PDA. The devices with Ti cap 5 □ and PMA500 ℃ enhance dielectric constant not very much.The devices with Ti cap 15 □ and PMA700 ℃ havelarge leakage current. The effects of interfacial engineering between high-k gate dielectrics and Si substrate.EOT scaling by reducing SRPO thickness.SRPO has better interface property. The devices with SRPO have better hysteresis and reliability properties.IL can not be reduced by Zr metal layer and chemical oxide reacting.