Abstract
The performance of high-voltage 4H-SiC lateral JFETs on a semi-insulating substrate is reported in this letter. The design of the voltage-supporting layers is based on the charge compensation of p- and n-type epilayers. The best measured breakdown voltage is 3510 V, which, to the authors' knowledge, is the highest value ever reported for SiC lateral switching devices. The R on of this device is 390 390-mΩ · cm 2 , in which 61% is due to the drift-region resistance. The BV 2 /R on is 32 MW/ cm 2 , which is typical among other reported SiC lateral devices. © 2009 IEEE.