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A -10 to -20-V Inverting Buck-Boost Drive GaN Driver With Sub-1-μA Leakage Current Vth Tracking Technique for 20-MHz Depletion-Mode GaN Metal-Insulator-Semiconductor High-Electron-Mobility Transistors
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A -10 to -20-V Inverting Buck-Boost Drive GaN Driver With Sub-1-μA Leakage Current Vth Tracking Technique for 20-MHz Depletion-Mode GaN Metal-Insulator-Semiconductor High-Electron-Mobility Transistors

Yong-Hwa Wen, Tz-Wun Wang, Tzu-Hsien Yang, Sheng-Hsi Hung, Kuo-Lin Zheng, Ke-Horng Chen, Ying-Hsi Lin, Shian-Ru Lin 和 Tsung-Yen Tsai
IEEE journal of solid-state circuits, 卷.58(2), 頁碼.497-507
01/02/2023
Web of Science ID: WOS:000826440500001

摘要

Electromagnetic interference Gallium nitride Gallium nitride (GaN) Leakage currents Logic gates Miller plateau (MP) voltage Switches Switching frequency Switching loss ultralow quiescent current Vth tracking
This article proposes an inverting buck-boost drive (IBBD) gallium nitride (GaN) driver, which directly drives depletion-mode GaN (D-GaN) metal-insulator-semiconductor high-electron-mobility transistor (MIS-HEMT). In the proposed driver fabricated with a 0.5-<inline-formula> <tex-math notation="LaTeX"> μ \text{m}{<}{/}tex-math></inline-formula> CMOS process, the <inline-formula> <tex-math notation="LaTeX"> V_(\mathrm th)</tex-math></inline-formula> tracking technique can reduce switching loss and minimize the leakage current of D-GaN MIS-HEMT to sub-1 <inline-formula> <tex-math notation="LaTeX"> μ \text{A}{<}{/}tex-math></inline-formula>. To suppress the electromagnetic interference (EMI) caused by the ringing voltage at drain of the GaN switch when reducing from 22 to 1.9 V, a Miller plateau (MP) detector and an EMI suppression frequency controller (ESFC) are also applied. With the slew rate (SR) control and fast-level shifter, the maximum switching frequency can reach up to 20 MHz, and <inline-formula> <tex-math notation="LaTeX"> dV_(\mathrm DS)</tex-math></inline-formula>/dt can be regulated at 120 V/ns. In addition, the power saving mode of IBB converter and accurate ultralow power (ULP) under voltage lockout (UVLO) are proposed to reduce the quiescent current to 580 nA during standby mode, thereby enhances light load efficiency. The peak efficiency is as high as 95.8% and chip areas are 5.1 and 6.6 mm2.

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