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A 0.18-μm CMOS balanced amplifier for 24-GHz applications
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A 0.18-μm CMOS balanced amplifier for 24-GHz applications

Jun-De Jin 和 Shawn S. H. Hsu
IEEE Journal of Solid-State Circuits, 卷.43(2), 頁碼.440-445
02/2008
Web of Science ID: 000252813600013

摘要

Balanced amplifier CMOS Lumped-element coupler Narrowband amplifier Parallel resonance
A 24-GHz balanced amplifier (BA) with a 45-dB gain is realized in 0.18-μm CMOS technology. An effective technique, π-type parallel resonance, is proposed to boost the high-frequency gain of a MOSFET by resonating out the inherent capacitances. The miniaturized lumped-element coupler in the circuit occupies a chip area of only ∼2% compared to that of the conventional transmission-line coupler. The BA consumes 123 mW from a supply voltage of 1 V. To the best of the authors' knowledge, the proposed CMOS BA presents the highest gain of 45.0 dB with a chip area of 0.97 × 0.63 mm 2 (core area: 0.78 × 0.43 mm 2 ) among the published narrowband amplifiers with similar technologies and operation frequencies. © 2008 IEEE.

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引用書目主題
4 Electrical Engineering, Electronics & Computer Science
4.138 Semiconductor Technology
4.138.205 RF CMOS Design
Web Of Science研究領域
Engineering, Electrical & Electronic
ESI研究領域
Engineering

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