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A 0.5 v PWM CMOS imager with 82 db dynamic range and 0.055% fixed-pattern-noise
Journal article   Peer reviewed

A 0.5 v PWM CMOS imager with 82 db dynamic range and 0.055% fixed-pattern-noise

Meng-Ting Chung, Chih-Lin Lee, Chin Yin and Chih-Cheng Hsieh
IEEE Journal of Solid-State Circuits, Vol.48(10), pp.2522-2530
2013

Abstract

CMOS imager dynamic range fixed-pattern-noise (FPN) pulse-width modulation (PWM)
This paper presents a 0.5 V operated pulse-width modulation (PWM) CMOS imager with threshold-variation canceling (TVC) and programmable current-controlled threshold (PCCT) schemes implemented in 0.18 μm CMOS technology. The proposed TVC scheme efficiently improves the fixed-pattern-noise (FPN) issue caused by process variation in conventional PWM sensors. The limited dynamic range in ultra-low-voltage operated sensor can be extended by 56.5 dB with the proposed PCCT operation. The measurement results of the prototype chip show an array FPN of 0.055%, a column FPN of 0.016%, a dark random noise of 0.65 LSB, and a dynamic range (DR)of 82 dB. The total chip consumes 4.95 uW and 29.6 μW at 11.8 fps and 78.5 fps, which achieves an iFOM of 163.9 pW/f-p and 147.3 pW/f-p, respectively. © 2013 IEEE.

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