Abstract
This paper presents an operational amplifier for a 1-V supply voltage. It comprises three gain stages with ac-boosting and buffered Miller feedback compensation circuits. The implementation uses a standard 0.35-μm CMOS process (V TN = 0.6 V and V TP = -0.72 V). To accommodate maximum voltage headroom between power rails, a pseudo-differential structure is adopted in this amplifier. The large common-mode gain associated with the structure is suppressed by two common-mode stabilization loops. The amplifier driving 100-pF loads achieves a 4.3-MHz gain-bandwidth product. The settling time of a 1- V pp input step signal is 1.1 μs. The amplifier consumes 249 μW and occupies 0.06-mm 2 silicon area. © 2008 IEEE.