摘要
This paper proposes a 10-bit two-stage resistor string digital-to-analog converter (R-DAC) architecture with source followers to isolate parallel-connected resistor strings, with a dc-offset compensation scheme to compensate for the offset voltages of the source followers. To compensate for these offset voltages, another source follower is inserted in the feedback loop of the buffer amplifier. Two prototypes of a 24-channel column driver were fabricated using the 0.18-&null CMOS technology; the worst differential nonlinearity and integral nonlinearity through a one-voltage selection scheme were 0.6 and 0.77 LSB, respectively, and those through a two-voltage selection scheme were 0.4 and 0.52 LSB, respectively. The proposed 10-bit two-stage R-DACs with one-/two-voltage selection schemes occupy only 57&null of the area of a conventional 8-bit R-DAC using the same technology.