摘要
This article presents a 112-Gb/s four-level pulse amplitude modulation (PAM-4) voltage-mode transmitter (TX) with a four-tap feed-forward equalizer (FFE). A two-step coarse-/fine-tuning technique is adopted in the voltage-mode FFE to reduce the number of front-end slices while maintaining sufficient resolution. In addition, the device sizes in the preceding multiplexer (MUX) and predriver can be enlarged, relaxing the self-loading effect from the layout and improving the bandwidth. An analog impedance control loop is applied to achieve output impedance matching and maintain the corresponding weighting between coarse- and fine-FFE stages. The quarter-rate 4:1 MUX incorporates an automatic phase alignment technique to eliminate the timing constraint. As a result, all of the retiming latches can be removed, saving significant power. Designed and fabricated in 40-nm CMOS, the PAM-4 TX demonstrates a high-quality eye diagram at 112 Gb/s with 3.89-pJ/b energy efficiency under a chip-on-board assembly with 5.5-dB Nyquist loss.