摘要
This paper presents a 128 & times;128 smart CMOS image sensor that utilizes the processing-in-sensor (PIS) technique for gradient-based pyramidal optical flow pre-processing in power-and bandwidth-constrained edge vision systems. By embedding motion feature extraction directly within the image sensor, the proposed design avoids complex computation and frequent frame-buffer access in digital processors. The sensor simultaneously outputs temporal gradients, two-dimensional spatial gradients, raw intensity images, and dual-resolution data within a single frame period. A multi-row access readout scheme enables concurrent availability of neighboring pixel data, while column-level time-domain processing circuits efficiently compute spatial gradients and 3 & times;3 binning without relying on power-hungry analog subtraction or extensive digital buffering. Fabricated in TSMC 0.18-mu m standard CMOS process, the prototype sensor operates at 198.44 mu W at 30 fps. Measurement results demonstrate accurate gradient and binning outputs, with root-mean-square errors of 0.4 LSB for spatial gradients and 1.6 LSB for binned images (8-bit). Using the measured gradients, off-chip optical flow computation achieves an end-point error of 0.375 pixel, and the proposed binning-based pyramidal scheme extends the detectable motion range by approximately three times. The proposed vision sensor achieves an iFoM of 0.1971pJ/pixel & sdot; frame & sdot; level, validating the effectiveness of the proposed PIS-based architecture for motion-aware edge vision applications.